1. Field of the Invention
This invention relates to a ball grid array (BGA) package and its fabricating process, and more particularly to a substrate for a ball grid array package and the fabricating process of the substrate.
2. Description of Related Art
The IC (integrated circuit) packaging is the last step of the fabrication of the IC products. The purpose of the IC packaging is to provide the chip a medium for electrical connection to the PCB (Printed Circuit Board) or other appropriate devices, and additionally, to protect the chip from being damaged or short-circuit.
The IC circuit is generally encapsulated in a package and is then bonded to the PCB or other substrates, and the BGA package is one of the package structure being used very often. As the degree of integration of the IC is getting higher and higher, a lot of wires are led out, and hundreds of connections are required to constitute an integrated circuit. Therefore, it becomes necessary for the improvement on the design and fabrication process etc. of the chip carrier used for carrying the chip in order to perform packaging, and of the substrates of PCB and circuit carrier used for the connection and assembly of electronic components.
Shown in FIG. 1 is a top view of a substrate of a ball grid array package according to the prior art presented in 1994 by Intel Company with U.S. Pat. No. 5,519,580. A surface of a substrate 100 comprises a ball pad 102, a via 114, and a solder mask 110. The ball pad 102 further comprises a center area 104, and tabs 106 which is symmetrically outward extended in radial direction. The peripheral of the via 114 is having a via land 116 which is electrically connected to the center area 104 by a conductive connecting bar 108. The solder mask is used for covering the circuit to prevent unnecessary electrical connection. There is a ball pad opening 112 concentrically disposed with the ball pad 102 with a diameter of the ball pad opening 112 greater than that of the center area 104.
FIG. 1B is a cross-sectional view of a portion of the structure of the BGA package shown in FIG. 1A. As shown in FIG. 1B, the center area 104 on the surface 101 of the substrate 100 is positioned at the center of the ball pad opening 112, and is not covered by the solder mask 110. The solder ball 118 is disposed on the center area 104 and is connected to the surface 101 and the side wall of the ball pad 102. Thereby, the contact area between the solder ball 118 and the ball pad 108 is relatively large, consequently, a relatively more robust solder joint can be obtained. FIG. 1C shows that when the solder joint is not robust enough to sustain the external forces, the center area 104 of the ball pad 102 would crack to become cracked center area 104xe2x80x2 and 104xe2x80x3. Consequently, the solder ball 118 and the center area 104xe2x80x2 would separate from the surface 101 of the substrate 100 which would result in poor reliability on the bonding between the solder ball 118 and the substrate 100.
Shown in FIG. 2A is a top view of a substrate of a ball grid array package according to the prior art presented in 1996 by Intel Company with U.S. Pat. No. 5,706,178. As shown in the FIG. 2A, elliptically shaped ball pads 202 are disposed on the substrate 200 and are parallel to the long axis. Vias 204 and 204xe2x80x2 are also set up in the area of the ball pad 202. The solder mask 206 and the ball pad 202 are both on the same side surface of the substrate 200. And the solder mask 206 has a set-up of a ball pad opening 208 with a diameter which is equal to the short axis 212 of the elliptically shaped ball pads 202. Therefore, the ball pad opening 208 can expose a portion of the surface of the elliptically shaped ball pads 202 while the remaining portion will be covered by the solder mask 206.
FIG. 2B and FIG. 2C are the cross-sectional views of FIG. 2A along the cross-section 2Bxe2x80x942B and the cross-section 2Cxe2x80x942C respectively. Since FIG. 2B is also a cross-sectional view along the short axis 212 of the ball pad 202, the ball pad 202 is not covered by the solder mask 206, i.e. the diameter of the ball pad opening 208 (in FIG. 2A) is equal to the length of the short axis 212 of the elliptical ball pad 202. Since FIG. 2C is also a cross-sectional view along the long axis 214 of the elliptical ball pad 202, a portion of the ball pad 202 is covered by the solder mask 206, i.e. the diameter of the ball pad opening 208 (in FIG. 2A) is smaller than the length of the long axis 214 of the elliptical ball pad 202. The solder ball 216 is disposed in the ball pad opening 208, and is attached to the ball pad 202.
This type of package employs elliptically shaped ball pad 202 in order to increase the routing space available in between the ball pads, and further to raise the routing density of the conductive trace 210 in between the ball pads. A portion of the surface of the elliptical ball pad 202 is covered by the solder mask 206 which can reinforce the solder joint between the ball pad 202 and the substrate 200, and increase the peel strength of the ball pad 202. But limiting by the ball pad opening 208, there is only a surface contact without the side wall connection between the solder ball 216 and ball pad 202, therefore, the solder joint between them is not quite strong.
Shown in FIG. 3A is the top view of a type of ball pad and conductive trace arrangement on the substrate according to the prior art. There are ball pads 302, conductive traces 304, and a solder mask 306 attaching to the a substrate 300 made of Bismaleimide-Triazine (BT) resin. The spacing between the solder balls 312 is 1,270 xcexcm (micron), and the ball pad diameter 310 is 800 xcexcm, hence the distance between the edge of the ball pads is 470 xcexcm. As the width 314 of the conductive trace 304 is 100 xcexcm, at least 50 xcexcm is needed for the spacing between each of the conductive trace 304 and each ball pad 302 and for the spacing between the adjacent conductive traces 304. Thereby, only two conductive traces 304 can be disposed between two adjacent traces 304. Consequently, the routing capability of the substrate 300 will be affected such that its routing density is unable to increase.
Additionally, FIG. 3B is a cross-sectional view of FIG. 3A along section 3Bxe2x80x943B. As shown in FIG. 3A and FIG. 3B, the solder mask 306 covers all over the top of substrate 300 including the conductive traces 304. The solder mask 306 covers also covers up to the peripheral portion of the ball pads 302 leaving only a center portion of the ball pads 302 that is exposed by the ball pad openings 308. The ball pad openings 308 having 600 xcexcm in diameter are concentrically disposed with the ball pad 302. In this way, the anchor force of the solder mask 306 covering the peripheral portion of the solder pads 302 can strengthen the solder joint between the solder pads 302 and the substrate 300. The solder balls 320 are attached to the ball pad 302 through the ball pad openings 308. Similar to the situation in FIG. 2B, limiting by the dimension of the ball pad opening 308, there is only a surface contact without the side wall connection between the solder ball 320 and ball pad 302, therefore, the solder joint between them is not quite strong.
What is more, shown in FIG. 3C is the top view of another type of ball pad and conductive trace arrangement on the substrate according to the prior art. Similar to those in FIG. 3A, same component numbers are used in FIG. 3C. As shown in FIG. 3C, three conductive traces 304xe2x80x2 can be disposed in between the adjacent ball pads 302 if the width 314xe2x80x2 of the conductive traces 304xe2x80x2 is reduced down to 90 xcexcm rather than 100 xcexcm as shown in FIG. 3A. In this way, the routing density can be increased only that reducing the width of the conductive traces requires raising the manufacturing capability of the substrate, besides, the manufacturing cost will also be increased.
It is therefore an objective of the present invention to provide a ball grid array package and its fabricating process wherein the packaging substrate is high in routing capability, high in routing density, and low in manufacturing cost. This type of the package is robust in solder joint between the solder balls and ball pads, and good in solderability. In additions, since the ball pads are anchored on the substrate, the solder balls and the ball pads as a whole is relatively high in reliability with respect to the substrate.
In order to attain the foregoing objectives, the present invention provides a ball grid array package comprising a substrate having a first surface and a second surface, a chip, an insulating material, and a solder ball. Disposed on the first surface are solder balls, ball pads, and conductive traces wherein the conductive traces are disposed in between each of the two adjacent ball pads. The solder mask covers all the traces and a portion of each of the ball pads. Moreover, ball pad openings are set up in the area of the solder mask corresponding to the locations of the ball pads wherein the solder pad openings expose a portion of each of the ball pads and their side wall. Then, the chip is disposed on the second surface and is sealed and encapsulated by the insulating material. What is more, the solder balls are disposed on the first surface of the substrate and are located in the ball pad openings. Finally, the solder balls are electrically connected to a portion of the surface of each of the ball pads and their side wall exposed by the ball pad openings.
Additionally, in order to attain the foregoing objectives, the present invention provides a fabricating process of a ball grid array package. Firstly, a substrate is provided for carrying the chip and forming ball pads and conductive traces, and let the conductive traces disposed in between the adjacent ball pads. Next, a solder mask is formed on the first surface of the substrate by using a solder resist to cover the conductive traces and a portion of the ball pads. Then, ball pad openings are set up in the area of the solder mask corresponding to the locations of the ball pads wherein the solder pad openings expose a portion of each of the ball pads and their side wall. Consequently, the chip is disposed on the second surface of the substrate and is electrically connected to the substrate, then is sealed and encapsulated by an insulating material. Finally, the solder balls are disposed on the first surface of the substrate and are positioned at the ball pad opening of the solder mask and are electrically connected to the surface of a portion of the ball pads and their side wall exposed by the ball pad openings.